27th International Conference on Field-Programmable Logic and Applications

Paper submission

Authors are invited to submit original and unpublished contributions not exceeding 8 pages in IEEE double column format to be considered as regular papers. Final papers will be allowed to have 6 pages, with the possibility to buy two additional pages.

Submissions accepted as posters will have 4 pages and extended abstracts for PhD forum contributions appear with 2 pages in the proceedings. The conference proceedings will be submitted for inclusion to IEEE Xplore. Authors of selected papers will be invited to submit extended versions to a special issue in ACM TRETS. All contributions must be submitted electronically in PDF format. All submissions will undergo a double-blind review process so the identity of the authors should not be revealed in the submissions.

FPL's PhD forum is intended as a venue for PhD students to present their work in progress and preliminary results in a special poster session to receive feedback from other researchers.

Important dates
  • March 29, 2017 Abstract and Title submission deadline (extended)
  • April 5, 2017 Full Paper submission deadline (extended)
  • July 7, 2017 Final manuscripts deadline

Use the SoftConf submission site to submit your paper. Please note that the submission of the full- and short-paper abstracts by the relevant deadline is mandatory and that deadlines are not going to be extended.

Contributions on the listed topics within (but not limited to) the following five conference tracks are welcome:

Architectures and Technology
  • FPGAs versus GPUs and DSPs
  • Heterogeneous datacenters
  • Embedded computing
  • Low power architectures
  • Fault tolerant architectures
  • Security and cryptography for FPGA designs
  • 2.5D and 3D architectures
  • Advanced on-chip interconnect technologies, NoCs
  • Analog and mixed-signal arrays
  • Emerging device technologies
Applications and Benchmarks
  • Aerospace, automotive and industry automation
  • Bioinformatics & medical systems
  • Communications, software defined networking and Internet-of-Things
  • Finance, HPC and database acceleration
  • Big data analytics
  • Embedded & cyber physical system
  • Signal processing and SDR
  • Benchmarks for FPGA designs
Design Methods and Tools
  • System-level design tools
  • High-level synthesis
  • Hardware / software co-design
  • Logic optimization and technology mapping
  • Optimizations for power efficiency
  • Packing, placement and routing
  • Testing, debugging and verification
  • Open-source tools
Self-aware and Adaptive Systems
  • Self-awareness in FPGA-based systems
  • Self-adaptive architectures and design techniques
  • Virtualization of reconfigurable hardware
  • Runtime resource management
  • Partial reconfiguration
Surveys, Trends and Education
  • Surveys on reconfigurable logic architectures and design techniques
  • Deployment of FPGAs in new application domains
  • Roadmap of reconfigurable computing platforms
  • Teaching courses and tutorials